Show simple item record

dc.contributor.authorMontoro López, Gabriel
dc.contributor.authorWang, Teng
dc.contributor.authorLópez Bueno, David
dc.contributor.authorRuiz Lavín, María de las Nieves 
dc.contributor.authorGarcía García, José Ángel 
dc.contributor.authorGilabert Pinal, Pere Lluís
dc.contributor.otherUniversidad de Cantabriaes_ES
dc.date.accessioned2015-11-11T15:21:37Z
dc.date.available2015-11-11T15:21:37Z
dc.date.issued2016-09
dc.identifier.urihttp://hdl.handle.net/10902/7633
dc.description.abstractWith the increasing demands for higher data rate, wider signal bandwidth is required, and this imposes high sampling rate converters in the communications equipment. This paper provides and analyzes experimental results obtained from testing some of the most promising techniques able to reduce the sampling rate speed of the analog to digital converters and digital to analog converters to be used in the implementation of Digital Predistorters. In a first section, an overview of several of the recently published sampling rate reduction techniques is done, and later it’s included a section where the author’s activities related to the digital predistortion of wideband signals are explained, and some of their last research activities and results in sampling rate and bandwidth reduction are provided.es_ES
dc.format.extent4 p.es_ES
dc.language.isospaes_ES
dc.rights© 2015 URSI Españaes_ES
dc.sourceURSI 2015, XXX Simposium Nacional de la Unión Científica Internacional de Radio, Pamplonaes_ES
dc.titleReducción de la frecuencia de muestreo en los conversores ADC y DAC usados en predistorsionadores digitaleses_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.rights.accessRightsopenAccesses_ES
dc.type.versionpublishedVersiones_ES


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record