URSI 2006, XXI Simposium Nacional de la Unión Científica Internacional de Radio, Oviedo, p. 1310-1313
The implementation of a synthesized oscillator in the
5150-5250 MHz band, in 0.4μm BiCMOS technology, is described
in this paper. Since this circuit is intended to be used in a direct
conversion receiver, its VCO operates at double frequency so
that known adverse phenomena, such as frequency pulling and
LO leakage, are minimized. The static programmable frequency
divider combines both CML and CMOS logic families, and allows
the use of two possible carriers, 5175 and 5225 MHz. Phase
margin stays above 70º for any frequency within the VCO tuning
range. The overall power dissipation is below 104.3mW, and
the surface occupied by the circuit -excluding pads- is about
0.367mm².
