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dc.contributor.authorLamo Anuarbe, Paula
dc.contributor.authorLópez Vidal, Felipe 
dc.contributor.authorPigazo López, Alberto 
dc.contributor.authorAzcondo Sánchez, Francisco Javier 
dc.contributor.otherUniversidad de Cantabriaes_ES
dc.date.accessioned2018-01-12T14:12:10Z
dc.date.available2018-01-12T14:12:10Z
dc.date.issued2017
dc.identifier.isbn978-1-5090-5326-1
dc.identifier.isbn978-1-5090-5327-8
dc.identifier.otherTEC2014-52316-Res_ES
dc.identifier.urihttp://hdl.handle.net/10902/12819
dc.description.abstractA new implementation of the recently proposed fixed-frequency two-sample (2S) quadrature generation subsystem (QSG) digital Phase Locked Loop PLL, applicable to single-phase Power Factor Correction (PFC), is proposed. Its characteristics are high accuracy and low computational burden. The proposed PLL includes a frequency feedback loop to improve the synchronization under line frequency variations. Its performance within a digital controller of a current sensorless bridgeless PFC is evaluated by simulations and experimentally. The obtained results are compared with previously published PLLs in the literature.es_ES
dc.description.sponsorshipThis work has been supported by the Spanish Ministry of Economy and Competitiveness under grant TEC2014-52316-R ECOTREND Estimation and Optimal Control for Energy Conversion with Digital Devices.es_ES
dc.format.extent7 p.es_ES
dc.language.isoenges_ES
dc.publisherIEEEes_ES
dc.rights© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.es_ES
dc.sourceIEEE 18th Workshop on Control and Modeling for Power Electronics (COMPEL), Stanford, California, 2017, 29-35es_ES
dc.subject.otherPLLes_ES
dc.subject.otherBridgelesses_ES
dc.subject.otherConverteres_ES
dc.subject.otherSensorlesses_ES
dc.subject.otherSynchronizationes_ES
dc.subject.otherComputational burdenes_ES
dc.titleTwo-sample PLL with improved frequency response applied to single-phase current sensorless bridgeless PFCses_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.relation.publisherVersionhttps://doi.org/10.1109/COMPEL.2017.8013281es_ES
dc.rights.accessRightsopenAccesses_ES
dc.identifier.DOI10.1109/COMPEL.2017.8013281
dc.type.versionacceptedVersiones_ES


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