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dc.contributor.authorAledo Ortega, David 
dc.contributor.authorCarrion Schafer, Benjamin
dc.contributor.authorMoreno González, Félix Antonio
dc.contributor.otherUniversidad de Cantabriaes_ES
dc.date.accessioned2024-10-08T15:54:03Z
dc.date.available2024-10-08T15:54:03Z
dc.date.issued2019-03
dc.identifier.issn0916-8516
dc.identifier.issn1745-1345
dc.identifier.urihttps://hdl.handle.net/10902/34145
dc.description.abstractThis paper describes the advantages and disadvantages observed when describing complex parameterizable Artificial Neural Networks (ANNs) at the behavioral level using SystemC and at the Register Transfer Level (RTL) using VHDL. ANNs are complex to parameterize because they have a configurable number of layers, and each one of them has a unique configuration. This kind of structure makes ANNs, a priori, challenging to parameterize using Hardware Description Languages (HDL). Thus, it seems intuitively that ANNs would benefit from the raise in level of abstraction from RTL to behavioral level. This paper presents the results of implementing an ANN using both levels of abstractions. Results surprisingly show that VHDL leads to better results and allows a much higher degree of parameterization than SystemC. The implementation of these parameterizable ANNs are made open source and are freely available online. Finally, at the end of the paper we make some recommendation for future HLS tools to improve their parameterization capabilities.es_ES
dc.description.sponsorshipThis work was partially supported by the Consejo Social de la Universidad Politécnica de Madrid; and the Universidad Politécnica de Madrid under the grant RR01/2015 (Programa Propio).es_ES
dc.format.extent10 p.es_ES
dc.language.isoenges_ES
dc.publisherInstitute of Electronics, Information and Communication Engineerses_ES
dc.rights© Institute of Electronics, Information and Communication Engineerses_ES
dc.sourceIEICE Transactions on Communications, 2019, E102.D(3), 512-521es_ES
dc.subject.otherVHDLes_ES
dc.subject.otherSystemCes_ES
dc.subject.otherHigh-level synthesis (HLS)es_ES
dc.subject.otherArtificial neural network (ANN)es_ES
dc.titleVHDL vs. SystemC: design of highly parameterizable artificial neural networkses_ES
dc.typeinfo:eu-repo/semantics/articlees_ES
dc.relation.publisherVersionhttps://doi.org/10.1587/transinf.2018EDP7142es_ES
dc.rights.accessRightsopenAccesses_ES
dc.identifier.DOI10.1587/transinf.2018EDP7142
dc.type.versionpublishedVersiones_ES


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