VHDL vs. SystemC: design of highly parameterizable artificial neural networks
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2019-03Derechos
© Institute of Electronics, Information and Communication Engineers
Publicado en
IEICE Transactions on Communications, 2019, E102.D(3), 512-521
Editorial
Institute of Electronics, Information and Communication Engineers
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Palabras clave
VHDL
SystemC
High-level synthesis (HLS)
Artificial neural network (ANN)
Resumen/Abstract
This paper describes the advantages and disadvantages observed when describing complex parameterizable Artificial Neural Networks (ANNs) at the behavioral level using SystemC and at the Register Transfer Level (RTL) using VHDL. ANNs are complex to parameterize because they have a configurable number of layers, and each one of them has a unique configuration. This kind of structure makes ANNs, a priori, challenging to parameterize using Hardware Description Languages (HDL). Thus, it seems intuitively that ANNs would benefit from the raise in level of abstraction from RTL to behavioral level. This paper presents the results of implementing an ANN using both levels of abstractions. Results surprisingly show that VHDL leads to better results and allows a much higher degree of parameterization than SystemC. The implementation of these parameterizable ANNs are made open source and are freely available online. Finally, at the end of the paper we make some recommendation for future HLS tools to improve their parameterization capabilities.
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