Mostrar el registro sencillo

dc.contributor.authorSuárez Plata, Daniel Nicolás 
dc.contributor.authorPosadas Cobo, Héctor 
dc.contributor.authorFernández Solórzano, Víctor Manuel 
dc.contributor.otherUniversidad de Cantabriaes_ES
dc.date.accessioned2024-03-25T08:45:07Z
dc.date.available2024-03-25T08:45:07Z
dc.date.issued2023
dc.identifier.isbn979-8-3503-0385-8
dc.identifier.otherPID2020-116417RB-C43es_ES
dc.identifier.urihttps://hdl.handle.net/10902/32439
dc.description.abstractArtificial intelligence has demonstrated its ability to solve lots of critical tasks, but at the cost of high computational requirements. Different hardware has been proposed to provide this computational power, each one with its benefits and drawbacks. However, the exploration of the different alternatives in an easy an integrated way is still a complex task. To solve so, this paper proposes a UML-based design flow where neural networks are initially specified and then automatically generated and trained using TensorFlow. The approach also enables automatic mapping of models to CPU, GPU and FPGAs, using Xilinx’s Deep Learning Processor Units (DPUs). The framework also generates the communication codes required to connect the other system components with the implementation selected. This approach addresses design-space exploration challenges, system architecture definition, and improves implementation and training processes by saving time and effort.es_ES
dc.description.sponsorshipThis work has been supported by Project PID2020-116417RB-C43, funded by Spanish MCIN/AEI/10.13039/501100011033 and by the KDT JU agreement No 101007273 ECSEL DAIS, funded by EU H2020 and by Spanish pci2021- 121988es_ES
dc.format.extent6 p.es_ES
dc.language.isoenges_ES
dc.publisherInstitute of Electrical and Electronics Engineers, Inc.es_ES
dc.rights© 2023 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.es_ES
dc.source38th Conference on Design of Circuits and Integrated Systems (DCIS), Málaga, Spain, 112-117es_ES
dc.subject.otherAIes_ES
dc.subject.otherCNNes_ES
dc.subject.otherFPGAes_ES
dc.subject.otherUMLes_ES
dc.subject.otherAutomatic generationes_ES
dc.subject.otherDesign space explorationes_ES
dc.titleUML-based design flow for systems with neural networkses_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.relation.publisherVersionhttps://doi.org/10.1109/DCIS58620.2023.10335992es_ES
dc.rights.accessRightsopenAccesses_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/EC/H2020/101007273/EU/Distributed Artificial Intelligent Systems/DAIS/es_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/PID2020-116417RB-C43/ES/TECNOLOGIAS PARA INTELIGENCIA ARTIFICIAL RECONFIGURABLE APLICADAS A LA E-SALUD Y LA GANADERIA/es_ES
dc.identifier.DOI10.1109/DCIS58620.2023.10335992
dc.type.versionacceptedVersiones_ES


Ficheros en el ítem

Thumbnail

Este ítem aparece en la(s) siguiente(s) colección(ones)

Mostrar el registro sencillo