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dc.contributor.authorFuentes Saez, Pablo 
dc.contributor.authorVallejo Gutiérrez, Enrique 
dc.contributor.authorBeivide Palacio, Ramón 
dc.contributor.authorMinkenberg, Cyriel
dc.contributor.authorValero, Mateo
dc.contributor.otherUniversidad de Cantabriaes_ES
dc.date.accessioned2024-02-01T17:53:49Z
dc.date.available2024-02-01T17:53:49Z
dc.date.issued2017
dc.identifier.isbn978-1-5386-3914-6
dc.identifier.otherTIN2015-65316es_ES
dc.identifier.otherTIN2016-76635-C2-2-Res_ES
dc.identifier.urihttps://hdl.handle.net/10902/31396
dc.description.abstractDeadlock avoidance mechanisms for lossless lowdistance networks typically increase the order of virtual channel (VC) index with each hop. This restricts the number of buffer resources depending on the routing mechanism and limits performance due to an inefficient use. Dynamic buffer organizations increase implementation complexity and only provide small gains in this context because a significant amount of buffering needs to be allocated statically to avoid congestion. We introduce FlexVC, a simple buffer management mechanism which permits a more flexible use of VCs. It combines statically partitioned buffers, opportunistic routing and a relaxed distancebased deadlock avoidance policy. FlexVC mitigates Head-of-Line blocking and reduces up to 50% the memory requirements. Simulation results in a Dragonfly network show congestion reduction and up to 37.8% throughput improvement, outperforming more complex dynamic approaches. FlexVC merges different flows of traffic in the same buffers, which in some cases makes more difficult to identify the traffic pattern in order to support nonminimal adaptive routing. An alternative denoted FlexVCminCred improves congestion sensing for adaptive routing by tracking separately packets routed minimally and nonminimally, rising throughput up to 20.4% with 25% savings in buffer area.es_ES
dc.description.sponsorshipThis work has been supported by the Spanish Government (grant SEV2015-0493 of the Severo Ochoa Program), the Spanish Ministry of Economy, Industry and Competitiveness (contracts TIN2015-65316), the Spanish Research Agency (AEI/FEDER, UE - TIN2016-76635-C2-2-R), the Spanish Ministry of Education (FPU grant FPU13/00337), the Generalitat de Catalunya (contracts 2014-SGR-1051 and 2014-SGR-1272), the European Union FP7 programme (RoMoL ERC Advanced Grant GA 321253), the European HiPEAC Network of Excellence and the European Union’s Horizon 2020 research and innovation programme (Mont-Blanc project under grant agreement No 671697).es_ES
dc.format.extent14 p.es_ES
dc.language.isoenges_ES
dc.rights© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.es_ES
dc.source2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS), New York, IEEE, 2017es_ES
dc.subject.otherBuffer managementes_ES
dc.subject.otherDeadlock avoidancees_ES
dc.titleFlexVC: Flexible Virtual Channel management in low-diameter networkses_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.rights.accessRightsopenAccesses_ES
dc.relation.projectIDinfo:eu-repo/grantAgreement/EC/H2020/671697/EU/MONT-BLANC 3, European scalable and power efficient fpc platform based on low-power embedded technology/MONT-BLANC 3/es_ES
dc.identifier.DOI10.1109/IPDPS.2017.110
dc.type.versionacceptedVersiones_ES


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