Limitadores selectivos en frecuencia basados en circuitos paramétricos

Abstract

A parametric circuit based on varactor-diodes is presented for its application as a frequency selective limiter. A simplified analytical model is initially derived for a general understanding of the circuit performance. The power limitation is due to the frequency division of above threshold signals, leading to a reduction of the output power at the input frequency. Next, harmonic-balance simulation is applied to analyze the limiter behavior in presence of a strong and a weak signal. A matching technique is derived to increase the input-power range with high limitation level. Cascaded detuned stages are used to limit multiple above-threshold signals. An in-depth analysis of the behavior under two interferers is also presented, showing that each stage enables the frequency division of a different interferer. The techniques have been successfully applied to a frequency selective limiter in the 850 MHz band.