dc.contributor.author | Posadas Cobo, Héctor | |
dc.contributor.author | Merino Calleja, Javier | |
dc.contributor.author | Villar Bonet, Eugenio, 1957- | |
dc.contributor.other | Universidad de Cantabria | es_ES |
dc.date.accessioned | 2021-02-25T15:52:35Z | |
dc.date.available | 2021-02-25T15:52:35Z | |
dc.date.issued | 2020 | |
dc.identifier.isbn | 978-1-7281-9132-4 | |
dc.identifier.other | TEC2017-86722-C4-3-R | es_ES |
dc.identifier.uri | http://hdl.handle.net/10902/20814 | |
dc.description.abstract | The design of increasingly complex embedded systems requires powerful solutions from the very beginning of the design process. Model Based Design (MBD) and early simulation have proven to be capable technologies to perform initial design space analysis to optimize system design. Traditional MBD methods and tools typically rely on fixed elements, which makes difficult the evaluation of different platform configurations, communication alternatives or models of computation. Addressing these challenges require flexible design technologies able to support, from a high-level abstract model, full design space exploration, including system specification, binary generation and performance evaluation. In this context, this paper proposes a UML/MARTE based approach able to address the challenges mentioned above by improving design flexibility and evaluation capabilities, including automatic code generation, trace execution collection and trace analysis from the initial UML models. The approach focuses on the definition and analysis of the paths data follow through the different application components, as a way to understand the behavior or the different design solutions. | es_ES |
dc.description.sponsorship | This work has been funded by the EU and the Spanish MICINN/AEI through the ECSEL Comp4Drones and the
TEC2017-86722-C4-3-R PLATINO projects. | es_ES |
dc.format.extent | 6 p. | es_ES |
dc.language.iso | eng | es_ES |
dc.publisher | Institute of Electrical and Electronics Engineers, Inc. | es_ES |
dc.rights | © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | es_ES |
dc.source | XXXV Conference on Design of Circuits and Integrated Systems, DCIS, Segovia, 2020, 210-215 | es_ES |
dc.subject.other | UML | es_ES |
dc.subject.other | MoCs | es_ES |
dc.subject.other | Code generation | es_ES |
dc.subject.other | Trace analysis | es_ES |
dc.title | Data flow analysis from UML/MARTE models based on binary traces | es_ES |
dc.type | info:eu-repo/semantics/conferenceObject | es_ES |
dc.relation.publisherVersion | https://doi.org/10.1109/DCIS51330.2020.9268671 | es_ES |
dc.rights.accessRights | openAccess | es_ES |
dc.relation.projectID | info:eu-repo/grantAgreement/EC/H2020/826610/eu/Framework of key enabling technologies for safe and autonomous drones’ applications/COMP4DRONES/ | es_ES |
dc.identifier.DOI | 10.1109/DCIS51330.2020.9268671 | |
dc.type.version | acceptedVersion | es_ES |