dc.contributor.author | Lamo Anuarbe, Paula | |
dc.contributor.author | Azcondo Sánchez, Francisco Javier | |
dc.contributor.author | Pigazo López, Alberto | |
dc.contributor.other | Universidad de Cantabria | es_ES |
dc.date.accessioned | 2021-01-20T09:49:40Z | |
dc.date.available | 2021-01-20T09:49:40Z | |
dc.date.issued | 2020 | |
dc.identifier.isbn | 978-1-7281-4829-8 | |
dc.identifier.other | RTI2018-095138-B-C31 | es_ES |
dc.identifier.uri | http://hdl.handle.net/10902/20441 | |
dc.description.abstract | The performance of digitally controlled gridconnected power converters depends to a large extent on the synchronization strategy. Single-phase phase locked loops (PLL) with a second-order generalized integrator (SOGI) as quadrature signal generation subsystem provide proper grid synchronization in the case of harmonically distorted grid voltage. The SOGI-PLL transient performance can be improved by replacing the PLL by a frequency locked loop (FLL). However, compared with SOGI-PLLs, SOGI-FLLs perform poorly in steady-state. This work proposes to include a secondary control path (SCP) to improve the dynamics of SOGIPLLs, while maintaining the steady-state performance. Simulation and experimental results are provided to validate the proposal. | es_ES |
dc.description.sponsorship | This work has been supported by the Spanish Ministry of Science and Innovation under Project RTI2018-095138-B-C31 PEGIA – Power Electronics for the Grid and Industry Applications. | es_ES |
dc.format.extent | 5 p. | es_ES |
dc.language.iso | eng | es_ES |
dc.publisher | Institute of Electrical and Electronics Engineers, Inc. | es_ES |
dc.rights | © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | es_ES |
dc.source | 35th Annual IEEE Applied Power Electronics Conference and Exposition, New Orleans, 2020, 2979-2983 | es_ES |
dc.subject.other | Second-order generalized integrator | es_ES |
dc.subject.other | Phase Locked Loop | es_ES |
dc.subject.other | Synchronization | es_ES |
dc.subject.other | Digital control | es_ES |
dc.subject.other | Bidirectional bridge | es_ES |
dc.title | 1phi SOGI phase locked loop with secondary control path in grid-connected power converters | es_ES |
dc.type | info:eu-repo/semantics/conferenceObject | es_ES |
dc.relation.publisherVersion | https://doi.org/10.1109/APEC39645.2020.9124125 | es_ES |
dc.rights.accessRights | openAccess | es_ES |
dc.identifier.DOI | 10.1109/APEC39645.2020.9124125 | |
dc.type.version | acceptedVersion | es_ES |