| dc.contributor.author | Lamo Anuarbe, Paula | |
| dc.contributor.author | Pigazo López, Alberto | |
| dc.contributor.author | Azcondo Sánchez, Francisco Javier | |
| dc.contributor.other | Universidad de Cantabria | es_ES |
| dc.date.accessioned | 2020-12-18T18:10:01Z | |
| dc.date.available | 2020-12-18T18:10:01Z | |
| dc.date.issued | 2020-11-30 | |
| dc.identifier.issn | 2079-9292 | |
| dc.identifier.other | RTI2018-095138-B-C31 | es_ES |
| dc.identifier.uri | http://hdl.handle.net/10902/20217 | |
| dc.description.abstract | Low-cost single-phase grid connected converters require synchronization with the grid voltage to obtain a better response and protection under diverse conditions, such as frequency perturbations and distortion. Phase-locked loops (PLLs) have been used in this scenario. This paper describes a set of quadrature signal generators for single-phase PLLs; compares the performances by means of simulation tests considering diverse operation conditions of the electrical grid; proposes strategies to reduce the computational burden, considering fixed-point digital implementations; and provides both descriptive and quantitative comparisons of the required mathematical operations and memory units for implementation of the analyzed single-phase PLLs. | es_ES |
| dc.description.sponsorship | This work has been supported by the Spanish Ministry of Science and Innovation under Project RTI2018-095138-B-C31 PEGIA—Power Electronics for the Grid and Industry Applications. | es_ES |
| dc.format.extent | 22 p. | es_ES |
| dc.language.iso | eng | es_ES |
| dc.publisher | MDPI | es_ES |
| dc.rights | © 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license. | es_ES |
| dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | * |
| dc.source | Electronics, 2020, 9(12), 2026 | es_ES |
| dc.subject.other | Synchronization | es_ES |
| dc.subject.other | Phase-locked loop | es_ES |
| dc.subject.other | PLL | es_ES |
| dc.subject.other | Computational burden | es_ES |
| dc.subject.other | Digital implementation | es_ES |
| dc.subject.other | Single-phase | es_ES |
| dc.subject.other | Low-cost | es_ES |
| dc.subject.other | Low-voltage | es_ES |
| dc.title | Evaluation of quadrature signal generation methods with reduced computational resources for grid synchronization of single-phase power converters through phase-locked loops | es_ES |
| dc.type | info:eu-repo/semantics/article | es_ES |
| dc.rights.accessRights | openAccess | es_ES |
| dc.identifier.DOI | 10.3390/electronics9122026 | |
| dc.type.version | publishedVersion | es_ES |
Excepto si se señala otra cosa, la licencia del ítem se describe como © 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license.
