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dc.contributor.authorPosadas Cobo, Héctor 
dc.contributor.authorVillar Bonet, Eugenio, 1957- 
dc.contributor.authorSánchez Renedo, Manuel
dc.contributor.otherUniversidad de Cantabriaes_ES
dc.date.accessioned2020-02-04T17:54:17Z
dc.date.available2020-02-04T17:54:17Z
dc.date.issued2019
dc.identifier.isbn978-1-7281-5458-9
dc.identifier.otherTEC2017-86722-C4-3-Res_ES
dc.identifier.urihttp://hdl.handle.net/10902/18085
dc.description.abstractSpace applications rely on long and complex design processes, as they must deal with strict non-functional requirements such as criticality, timeliness, reliability and safety. The huge number of analysis and evaluations performed requires powerful simulations technologies combining high simulation speed and accuracy. Host-compiled simulation is a powerful approach to achieve fast, timed simulation of software running in complex embedded systems. However, in the general term, there is still the need of improving the speed and accuracy of these solutions, and there is a lack of host-compiled approaches oriented to space applications. To solve the first point, this paper presents an alternative that modifies the standard solution of adding the modeling of the cross-compiled control flow in the host computer by modifying the compiler's intermediate representation. That way, the host binary naturally follows the cross-compiled binary flow, avoiding a separate modeling, and improving simulation speed while maintaining accuracy. Additionally, the paper focuses on LEON processor, commonly used by the European Space Agency (ESA).es_ES
dc.description.sponsorshipThis work has been funded by FEDER/Ministerio de Ciencia, Innovación y Universidades - Agencia Estatal de Investigación/ TEC2017-86722-C4-3-R and the EC through the FP7-JTI 621429 EMC2 project.es_ES
dc.format.extent6 p.es_ES
dc.language.isoenges_ES
dc.publisherInstitute of Electrical and Electronics Engineers Inc.es_ES
dc.rights© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.es_ES
dc.source34th Conference on Design of Circuits and Integrated Systems (DCIS), Bilbao, 2019es_ES
dc.titleAccelerating host-compiled simulation by modifying IR code: industrial application in the spatial domaines_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.relation.publisherVersionhttps://doi.org/10.1109/DCIS201949030.2019.8959846es_ES
dc.rights.accessRightsopenAccesses_ES
dc.identifier.DOI10.1109/DCIS201949030.2019.8959846
dc.type.versionacceptedVersiones_ES


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