Frequency multipliers based on hybrid technology with high harmonic suppression
Identificadores
URI: http://hdl.handle.net/10902/15599ISBN: 978-1-5386-5285-5
ISBN: 978-2-87487-051-4
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2018Derechos
© 2018 EuMA (European Microwave Association)
Publicado en
48th European Microwave Conference (EuMC), Madrid, 2018, 1333-1336
13th European Microwave Integrated Circuits Conference (EuMIC), Madrid, 2018, 365-368
Editorial
IEEE
Enlace a la publicación
Palabras clave
Frequency conversion
Operation frequency
Bipolar transistors
Doubler
Tripler
Hybrid integrated circuits
Resumen/Abstract
A wideband frequency multipliers using SiGe bipolar transistors are proposed in this paper. The main circuit of these frequency multipliers consists of an attenuator followed by a bias network and a band pass filter which selects the desired harmonic at the output. The designed doubler can convert a 2–3 GHz input signal to a 4–6 GHz signal, with high suppressions of 59 dB, and 41 dB on the fundamental, and the third harmonic respectively. The tripler can convert a 2.3−2.7 GHz input signal to a 7–8 GHz signal, with suppressions of 68 dB, 52 dB, and 43 dB on the fundamental, the second, and fourth harmonics respectively.
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