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Visualizar por autor "Villar Bonet, Eugenio, 1957-"
Mostrando ítems 1-20 de 35
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Accelerating host-compiled simulation by modifying IR code: industrial application in the spatial domain
Posadas Cobo, Héctor
; Villar Bonet, Eugenio, 1957-; Sánchez Renedo, Manuel (Institute of Electrical and Electronics Engineers Inc., 2019)
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AI-based estimation of embedded software execution cycles in host-compiled simulation
Gómez Varela, Raúl; Aledo Ortega, David; Posadas Cobo, Héctor; Villar Bonet, Eugenio, 1957- (Institute of Electrical and Electronics Engineers, Inc., 2024)
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Bridging MoCs in SystemC specifications of heterogeneous systems
Damm, Markus; Haase, Jan; Grimm, Christoph; Herrera Casanueva, Fernando; Villar Bonet, Eugenio, 1957- (Hindawi-SpringerOpen, 2008)
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C-based design of heterogeneous embedded systems
Grimm, Christoph; Jantsch, Axel; Shukla, Sandeep; Villar Bonet, Eugenio, 1957- (Hindawi Publishing Corporation-SpringerOpen, 2008)
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CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties
Grüttner, Kim; Görgen, Ralph; Schreiner, Sören; Herrera Casanueva, Fernando; Peñil del Campo, Pablo; Medina Pasaje, Julio Luis; Villar Bonet, Eugenio, 1957-; Palermo, Gianluca; Fornaciari, William; Brandolese, Carlo; Gadioli, Davide; Vitali, Emanuele; Zoni, Davide; Bocchio, Sara; Ceva, Luca; Azzoni, Paolo; Poncino, Massimo; Vinco, Sara; Macii, Enrico; [et al.] (Elsevier, 2017-06)
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Data flow analysis from UML/MARTE models based on binary traces
Posadas Cobo, Héctor; Merino Calleja, Javier; Villar Bonet, Eugenio, 1957- (Institute of Electrical and Electronics Engineers, Inc., 2020)
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Desarrollo de plataformas OpenRISC-V
(2022-07-07) -
Estimación de prestaciones para exploración de diseño en sistemas embebidos complejos HW/SW
Posadas Cobo, Héctor (Universidad de Cantabria, 2011-07-21)
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Implementación de un procesador RISC-V sobre FPGA ZCU102
(2021-09-30) -
Impresión de chocolate en 3D con brazo robótico
(2022-12-16)
