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Visualizar por autor "Fernández Solórzano, Víctor Manuel"
Mostrando ítems 1-19 de 19
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Accelerating the verification of forward error correction decoders by PCIe FPGA cards
Suárez Plata, Daniel Nicolás
; Fernández Solórzano, Víctor Manuel; Posadas Cobo, Héctor; Sánchez Espeso, Pablo Pedro (Institute of Electrical and Electronics Engineers, Inc., 2023-09)
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An efficient NB-LDPC decoder architecture for space telecommand links
Álvarez Ruiz, Ángel; Fernández Solórzano, Víctor Manuel; Matuz, Balázs (Institute of Electrical and Electronics Engineers, Inc., 2021-04)
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CNN-LSTM implementation methodology on SoC FPGA for human action recognition based on video
Suárez Plata, Daniel Nicolás; Fernández Solórzano, Víctor Manuel; Posadas Cobo, Héctor (Institute of Electrical and Electronics Engineers Inc., 2024)
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Design space exploration in heterogeneous platforms using OpenMP
Álvarez Ruiz, Ángel; Ugarte Olano, Íñigo; Fernández Solórzano, Víctor Manuel; Sánchez Espeso, Pablo Pedro (Institute of Electrical and Electronics Engineers, Inc., 2019)
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HW-SW codesign of a positioning system. From UML to implementation case study
Álvarez Ruiz, Ángel; Ugarte Olano, Íñigo; Martínez Mediavilla, Patricia María; Fernández Solórzano, Víctor Manuel (Institute of Electrical and Electronics Engineers, Inc., 2016)
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Pre-silicon FEC decoding verification on SoC FPGAs
Fernández Solórzano, Víctor Manuel; Abad García, Carlos; Álvarez Ruiz, Ángel; Ugarte Olano, Íñigo; Sánchez Espeso, Pablo Pedro (Institute of Electrical and Electronics Engineers Inc., 2021-01)
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UML-based design flow for systems with neural networks
Suárez Plata, Daniel Nicolás; Posadas Cobo, Héctor; Fernández Solórzano, Víctor Manuel (Institute of Electrical and Electronics Engineers, Inc., 2023)
