@conference{10902/3400,
year = {2004},
month = {9},
url = {http://hdl.handle.net/10902/3400},
abstract = {In this paper, the use of a gate bias resistor is
proposed for conforming a wide linearity sweet-spot in class B
or C amplifiers based on junction FET technologies. An
illustrative E-pHEMT transistor has been characterized in
terms of its intermodulation distortion (IMD) behaviour versus
input power, paying particular attention to the evolution of the
gate-to-source voltage where the sweet-spot appears. The DC
current, resulting from rectification of large gate-to-source
voltage swings, has also been studied. It proved to be useful as
an element for dynamically adjusting VGS with the RF power
level, through the addition of an adequate resistor in the DC
path. Finally, experimental results of this sweet-spot
enhancement in both B and C amplifying classes are shown,
either using the classical two-tone excitation or a real IS-95
modulated signal.},
publisher = {URSI 2004, XIX Simposium Nacional de la Unión Científica Internacional de Radio, Barcelona},
title = {Control del sweet-spot de IMD en dispositivos FET usando una resistencia de polarización de puerta},
author = {Gómez Fernández, María del Carmen and García García, José Ángel and Pedro, Jose Carlos Esteves Duarte},
}