@conference{10902/23799,
year = {2021},
url = {http://hdl.handle.net/10902/23799},
abstract = {Synchronization in a single-phase Power Factor Correction (PFC) is deteriorated, among others, by the combination of the noise introduced by the grid voltage sensing, conducted EMI, the ADC resolution and the sampling frequency used. Low signal-to-noise ratios (SNR) reduce the performance of the Two-Sample (2S) Phase Locked Loop (PLL). This effect can be compensated by including a smoothing filter action without increasing the overall complexity significantly. The resulting 2S with smoothing (2SS) is evaluated and validated by simulation and experimentally over a Totem Pole PFC.},
organization = {This work has been supported by the Spanish Ministry of Science and Innovation under Project RTI2018-095138-BC31 PEGIA - Power Electronics for the Grid and Industry Applications.},
publisher = {Institute of Electrical and Electronics Engineers, Inc.},
publisher = {IEEE 22nd Workshop on Control and Modelling of Power Electronics (COMPEL), Cartagena, Colombia, 2021},
title = {Improved noise immunity for two-sample PLL applicable to single-phase PFCs},
author = {Lamo Anuarbe, Paula and Azcondo Sánchez, Francisco Javier and Pigazo López, Alberto},
}